Event status register
The event status register bits are set when certain events occur during PLZ-4W/PLZ-4WL/PLZ-4WH operation. All bits of the event status register are set by the error event queue.
The register is defined by the IEEE488.2 standard. IEEE488.2 common commands *ESE, *ESE?, and *ESR? are used to control the register.
| Bit | Bit Weight | Bit Name | Description |
|---|---|---|---|
| 0 | 1 | Operation Complete (OPC) | Set when an *OPC command is received and all operations in standby are complete. Event-800 Operation Complete message is loaded in the error/event queue. |
| 1 | 2 | Request Control (RQC) | Not used |
| 2 | 4 | Query Error (QYE) | Set when an attempt is made to read data from the output queue when no output is either present or pending.Indicates that there is no data in the output queue. |
| 3 | 8 | Device Dependent Error (DDE) | Set when there is a device-specific error. |
| 4 | 16 | Execution Error (EXE) | Set when the PLZ-4W/4WL evaluates the program data following the header is outside the formal input range (does not match the performance of the PLZ-4W/PLZ-4WL/PLZ-4WH).This indicates that a valid SCPI command may not be executed correctly depending on the conditions of the PLZ-4W/PLZ-4WL/PLZ-4WH. |
| 5 | 32 | Command Error (CME) | Set when an IEEE 488.2 syntax error is detected, when an unidentifiable header is received, or when a group execution trigger enters the internal IEEE 488.2 SCPI command input buffer. |
| 6 | 64 | User Request (URQ) | Set when the bit is unmasked and the instrument wishes to respond to the 488.2 user request event. |
| 7 | 128 | Power ON (PON) | Not used |
| 8-15 | Reserved | Not used |